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Table of Contents
Bit-select
Block Statements
Built-in Primitives
Case Statement
Continuous Assignments
Conversion Functions
Comments
Compiler Directives
Concatenations
Conditional Operator
Delays
Disable Statement
Display Tasks
Edge Sensitive Path
Expression Bit Length
File I/O Functions
Functions
Identifiers
If Statement
Integer Constants
Intra-assignment Timing Controls
Keywords
Loop Statements
Memories
min:typ:max Delays
Module Declaration
Module Instantiation
Module Path Declaration
Module Path Polarity
Net Data Types
Operators
Parameters
Part-select
PLA Modeling Tasks
Probabilistic Distribution Functions
Procedural Assignments
Procedural Continuous Assignments
Procedural Timing Control
Range Specification
Real Constants
Register Data Types
Simulation Control Tasks
Simulation Time Functions
Specify Block
State Dependent Path
Stochastic Analysis Tasks
Strengths
Strings
Structured Procedures
Tasks
Timescale System Tasks
Timing Check Tasks
UDP Declaration
UDP Instantiation
UDP State Table
Value Change Dump (VCD) File
Vectors

Register Data Types

Formal Definition

Registers provide means for modeling data storage elements.

Simplified Syntax:

reg range list_of_identifiers;

integer list_of_identifiers;

real list_of_identifiers;

time list_of_identifiers;

realtime list_of_identifiers;

Description

Registers are data types that store assigned values until a new assignment occurs. A new value can be assigned to registers only by using procedural assignments.

The reg register is a 1-bit wide data type. If more than one bit is required then range declaration should be used (see Vectors for more explanations). Negative values assigned to reg data type variables are treated as unsigned values (see Arithmetic expressions with integers and registers for more explanations). Reg data type variables can be declared as memory.

The integer register is a 32-bit wide data type. Integer declarations cannot contain range specification. Integer variables can be declared as memory. Integers store signed values.

The time register is a 64-bit wide data type that is used to store simulation time and to check timing dependence. Time type registers store values as unsigned numbers. Time declaration cannot contain range specification. Time data type variables can be declared as memories.

The real register is a 64-bit wide data type that stores floating-point values. Real registers cannot be used with event control, concatenations ({}), modulus operator (%), case equality (===, !==), bit-wise operators (~, &, |, ^, ^~, ~^), reduction operators (^, ~^, ^~, &, &~, |, |~) and shift operators (<<, >>). Bit-selects and part-selects on real type variables are not allowed.

The realtime registers are treated in the same way as real registers.

Examples

reg scal;
reg [7:0] vect;
reg [7:0] mem [31:0];
integer i;
integer i_mem [7:0];
time t;
time t_mem [3:0];
real r;
realtime rt1, rt2;

'scal' is a 1-bit wide reg type register.

'vect' is an 8-bit wide reg type register.

'mem' is a reg type memory of 32 8-bit words.

'i' is an integer type register.

'i_mem' is an integer type memory.

't' is a time type register.

't_mem' is a time type memory.

'r' is a real type register.

'rt1' and 'rt2' are realtime type registers.

Important Notes

  • New values can be assigned to registers only by using procedural statements.

  • Some operators, bit-selects, part-selects, range and memory declaration arecannot be used with real and realtime type registers.

  • Range can be specified only for reg data type registers.

  • Real and realtime registers are initialized to zero value. Reg, integer and time registers are initialized to unknown value (x).

 

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