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RASSP Design For Testability Application Note

1.0 Executive Summary

1.1 The Design For Test (DFT) Methodology - Complete Life Cycle Testability Support

The RASSP program has significantly benefited with the development of the DFT Methodology and its application to the Benchmark efforts. RASSP Design For Testability ensures that hardware and software for a signal processing system is testable during all RASSP life cycle phases and that the system complies with all customer supplied requirements. DFT also generates significant economic benefits which reduce the overall life cycle cost of a product, as illustrated in Figure 1 - 1.

Figure 1 - 1: RASSP Uses a Common DFT Methodology Across All Project Phases.

1.2 The DFT Application Process - Tools and Design Element Reuse

Application of the DFT methodology is initiated by generating a set of consolidated test requirements by a team of experts with design, manufacturing, and field deployment experience. These requirements are processed to yield Test Strategy Diagrams (TSDs) that support and a singular test philosophy which applies (to the extent possible) a common test strategy to all life RASSP life cycle project phases. The TSD is an EXCEL spreadsheet based utility that manages (distributes) requirement allocation to all packaging levels and monitors multilevel conformance to these distributed requirements. In parallel with the TSD development, a complete supporting test architecture (TA) shown in Figure 1-2 is developed which specifies:
  1. testbenches for design simulation,
  2. details of board level DFT and BIST features
  3. detailed specification of test equipment and test program sets (TPSs) is developed. This is followed by the development of detailed test plans and the procedures which implement these plans.

DFT insertion begins during system design. It is developed during simulation and is installed and then validated in a prototype. This leads to the supporting manufacturing test, and eventually becomes a major part of (or the sole source of) the field supportability for a delivered system.

1.3 Summary of DFT Contribution to RASSP

RASSP DFT has developed a methodology that provides for the insertion of DFT enabling features into signal processing system designs and contributes significantly toward the RASSP 4X time and cost improvement goals. In addition to demonstrable testability improvements, DFT offers;
  1. the potential for up to a 20% reduction in life cycle cost,
  2. a pre-DFT to post-DFT test cost ratio of 2.3,
  3. a post-DFT to pre-DFT reduction factor for manufacturing test cost of 2.7X.

next up previous contents
Next: 2 Introduction Up: Appnotes Index Previous:Appnote DFT Index

Approved for Public Release; Distribution Unlimited January 1998 Dennis Basara