/*--------------- TTL library ----------------*/
module ckgen(ck);
output ck;
reg ck;
initial
#0 ck = 0;
always
#500 ck = ~ck;
endmodule
module dff(q,qbar,d,clock,preset,clear);
output q, qbar;
input d,clock,preset,clear;
nand #5
g1(l1,preset,l4,l2),
g2(l2,l1,clear,clock),
g3(l3,l2,clock,l4),
g4(l4,l3,clear,d),
g5(q,preset,l2,qbar),
g6(qbar,q,clear,l3);
endmodule
module ls138(y,mode,g1,g2a,g2b);
output[7:0] y;
input[2:0] mode;
input g1,g2a,g2b;
not #5
gg1(l1,g1),
gg3(l3,mode[0]),
gg4(l4,mode[1]),
gg5(l5,mode[2]),
gg6(l6,l3),
gg7(l7,l4),
gg8(l8,l5);
nor #5
gg2(l2,l1,g2a,g2b);
nand #5
gg9(y[0],l3,l4,l5,l2),
gg10(y[1],l6,l4,l5,l2),
gg11(y[2],l3,l7,l5,l2),
gg12(y[3],l6,l7,l5,l2),
gg13(y[4],l3,l4,l8,l2),
gg14(y[5],l6,l4,l8,l2),
gg15(y[6],l3,l7,l8,l2),
gg16(y[7],l6,l7,l8,l2);
endmodule
module ls139(y,g,a,b);
output[3:0] y;
input g,a,b;
not #5
g1(l1,g),
g2(l2,a),
g3(l3,b),
g4(l4,l2),
g5(l5,l3);
nand #5
g6(y[0],l1,l2,l3),
g7(y[1],l1,l3,l4),
g8(y[2],l1,l2,l5),
g9(y[3],l1,l4,l5);
endmodule
module ls151(w,y,d_in,a,b,c,strobe);
output w,y;
input[7:0] d_in;
input a,b,c,strobe;
wire[2:0] d_bar,d_sel;
not #5
n0(d_bar[0],a),
n1(d_bar[1],b),
n2(d_bar[2],c),
n3(d_sel[0],d_bar[0]),
n4(d_sel[1],d_bar[1]),
n5(d_sel[2],d_bar[2]),
n6(y,w),
n7(str,strobe);
and #5
a0(wa0,d_in[0],d_bar[2],d_bar[1],d_bar[0],str),
a1(wa1,d_in[1],d_bar[2],d_bar[1],d_sel[0],str),
a2(wa2,d_in[2],d_bar[2],d_sel[1],d_bar[0],str),
a3(wa3,d_in[3],d_bar[2],d_sel[1],d_sel[0],str),
a4(wa4,d_in[4],d_sel[2],d_bar[1],d_bar[0],str),
a5(wa5,d_in[5],d_sel[2],d_bar[1],d_sel[0],str),
a6(wa6,d_in[6],d_sel[2],d_sel[1],d_bar[0],str),
a7(wa7,d_in[7],d_sel[2],d_sel[1],d_sel[0],str);
nor #5
nr(w,wa0,wa1,wa2,wa3,wa4,wa5,wa6,wa7);
endmodule
module ls153(out1,out2,data1,data2,select_a,select_b,strobe1,strobe2);
output out1,out2;
input[3:0] data1,data2;
input select_a,select_b,strobe1,strobe2;
not #5
gg11(s1b,strobe1),
gg21(s2b,strobe2),
gg12(sbbar,select_b),
gg22(sabar,select_a),
gg13(sb,sbbar),
gg23(sa,sabar);
and #5
gg14(d1_0,s1b,data1[0],sbbar,sabar),
gg15(d1_1,s1b,data1[1],sbbar,sa),
gg16(d1_2,s1b,data1[2],sb,sabar),
gg17(d1_3,s1b,data1[3],sb,sa),
gg24(d2_0,s2b,data2[0],sbbar,sabar),
gg25(d2_1,s2b,data2[1],sbbar,sa),
gg26(d2_2,s2b,data2[2],sb,sabar),
gg27(d2_3,s2b,data2[3],sb,sa);
or #5
gg18(out1,d1_0,d1_1,d1_2,d1_3),
gg28(out2,d2_0,d2_1,d2_2,d2_3);
endmodule
module ls163(out,rc,data,clock,load,clear,p,t);
output[3:0] out;
output rc;
input[3:0] data;
input clock,load,clear,p,t;
buf #5
g1(l1,clock);
not #5
g2(l2,clear),
g10(l10,l4),
g11(l11,lf1bar),
g12(l12,lf2bar),
g24(l24,lf3bar),
g29(l29,lf4bar);
nor #5
g3(l3,l2,load),
g9(l9,l2,l3);
and #5
g4(l4,clear,load,p,t),
g5(l5,l3,data[0]),
g6(l6,l3,data[1]),
g7(l7,l3,data[2]),
g8(l8,l3,data[3]),
g13(l13,l9,out[0],l10),
g14(l14,l4,lf1bar),
g17(l17,l9,out[1],l16),
g18(l18,l11,l4,lf2bar),
g21(l21,l9,out[2],l20),
g22(l22,l12,l11,l4,lf3bar),
g26(l26,l9,out[3],l25),
g27(l27,l24,l12,l11,l4,lf4bar),
g30(rc,l29,l24,l12,l11,t);
or #5
g15(l15,l13,l14,l5),
g19(l19,l17,l18,l6),
g23(l23,l21,l22,l7),
g28(l28,l26,l27,l8);
nand #5
g16(l16,l11,l4),
g20(l20,l12,l11,l4),
g25(l25,l24,l12,l11,l4);
dff
f1(out[0],lf1bar,l15,l1,1'b1,1'b1),
f2(out[1],lf2bar,l19,l1,1'b1,1'b1),
f3(out[2],lf3bar,l23,l1,1'b1,1'b1),
f4(out[3],lf4bar,l28,l1,1'b1,1'b1);
endmodule
module ls169(out,rc,data,clock,load,ud,pbar,tbar);
output[3:0] out;
output rc;
input[3:0] data;
input clock,load,ud,pbar,tbar;
buf #5
g1(l1,clock),
g2(l2,load);
not #0
gx(t,tbar);
not #5
g3(l3,load),
g4(l4,ud),
g6(l6,l4),
g7(l7,lf4bar);
nand #5
g8(l8,lf4bar,lf3bar),
g9(l9,lf4bar,lf3bar,lf2bar);
nor #5
g5(l5,pbar,tbar),
g19(l19,l10,l11),
g20(l20,l12,l13,l14),
g21(l21,l15,l16,l17,l18),
g41(l41,lf1bar,lf2bar,lf3bar,lf4bar,l4,tbar),
g43(rc,l41,l42);
and #5
g10(l10,l4,l7),
g11(l11,l6,lf4bar),
g12(l12,l4,l8),
g13(l13,l6,lf3bar),
g14(l14,l6,lf4bar),
g15(l15,l4,l9),
g16(l16,l6,lf2bar),
g17(l17,l6,lf3bar),
g18(l18,l6,lf4bar),
g22(l22,l19,l5),
g23(l23,l20,l5),
g24(l24,l21,l5),
g29(l29,data[0],l3),
g30(l30,l2,l25),
g31(l31,data[1],l3),
g32(l32,l2,l26),
g33(l33,data[2],l3),
g34(l34,l2,l27),
g35(l35,data[3],l3),
g36(l36,l2,l28),
g42(l42,t,lf1bar,lf2bar,lf3bar,lf4bar,l4);
or #5
g37(l37,l29,l30),
g38(l38,l31,l32),
g39(l39,l33,l34),
g40(l40,l35,l36);
xnor #5
g25(l25,l5,lf4bar),
g26(l26,l22,lf3bar),
g27(l27,l23,lf2bar),
g28(l28,l24,lf1bar);
dff
f1(out[3],lf1bar,l40,l1,1'b1,1'b1),
f2(out[2],lf2bar,l39,l1,1'b1,1'b1),
f3(out[1],lf3bar,l38,l1,1'b1,1'b1),
f4(out[0],lf4bar,l37,l1,1'b1,1'b1);
endmodule
module ls175(q,qbar,d,clock,clear);
output[3:0] q,qbar;
input[3:0] d;
input clock, clear;
not #5
g1(clkb, clock),
g2(clrb, clear);
not #0
g3(clk, clkb),
g4(clr, clrb);
dff
ff0(q[0],qbar[0],d[0],clk,1'b1,clr),
ff1(q[1],qbar[1],d[1],clk,1'b1,clr),
ff2(q[2],qbar[2],d[2],clk,1'b1,clr),
ff3(q[3],qbar[3],d[3],clk,1'b1,clr);
endmodule
module ls181(f,cn4bar,l_y,l_x,aeqb,a,b,s,m,cnbar);
output[3:0] f;
output cn4bar,l_y,l_x,aeqb;
input[3:0] a,b,s;
input m,cnbar;
not #5
g1(l1,b[3]),
g9(l9,b[2]),
g17(l17,b[1]),
g25(l25,b[0]),
g33(l33,m);
and #5
g2(l2,b[3],s[3],a[3]),
g3(l3,l1,s[2],a[3]),
g4(l4,l1,s[1]),
g5(l5,b[3],s[0]),
g10(l10,b[2],s[3],a[2]),
g11(l11,l9,s[2],a[2]),
g12(l12,l9,s[1]),
g13(l13,b[2],s[0]),
g18(l18,b[1],s[3],a[1]),
g19(l19,l17,s[2],a[1]),
g20(l20,l17,s[1]),
g21(l21,b[1],s[0]),
g26(l26,b[0],s[3],a[0]),
g27(l27,l25,s[2],a[0]),
g28(l28,l25,s[1]),
g29(l29,b[0],s[0]),
g35(l35,l7,l16),
g36(l36,l7,l15,l24),
g37(l37,l7,l15,l23,l32),
g43(l43,cnbar,l31,l23,l15,l33),
g44(l44,l23,l15,l32,l33),
g45(l45,l15,l24,l33),
g46(l46,l16,l33),
g50(l50,cnbar,l31,l23,l33),
g51(l51,l23,l32,l33),
g52(l52,l24,l33),
g56(l56,cnbar,l31,l33),
g57(l57,l32,l33),
g63(aeqb,f[3],f[2],f[1],f[0]);
buf #5
g6(l6,a[3]),
g14(l14,a[2]),
g22(l22,a[1]),
g30(l30,a[0]),
g34(l34,l8);
nor #5
g7(l7,l2,l3),
g8(l8,l4,l5,l6),
g15(l15,l10,l11),
g16(l16,l12,l13,l14),
g23(l23,l18,l19),
g24(l24,l20,l21,l22),
g31(l31,l26,l27),
g32(l32,l28,l29,l30),
g40(l_y,l34,l35,l36,l37),
g47(l47,l43,l44,l45,l46),
g53(l53,l50,l51,l52),
g58(l58,l56,l57);
nand #5
g38(l38,l7,l15,l23,l31,cnbar),
g39(l_x,l7,l15,l23,l31),
g41(cn4bar,l_y,l38),
g61(l61,l33,cnbar);
xor #5
g42(l42,l7,l8),
g48(f[3],l42,l47),
g49(l49,l15,l16),
g54(f[2],l49,l53),
g55(l55,l23,l24),
g59(f[1],l55,l58),
g60(l60,l31,l32),
g62(f[0],l60,l61);
endmodule
module ls194(q,pin,s1,s0,rin,lin,clock,clear);
output[3:0] q;
input[3:0] pin;
input s1,s0,rin,lin,clock,clear;
not #5
g1(l1,s1),
g2(l2,l1),
g3(l3,s0),
g4(l4,l3);
buf #5
g25(l25,clear);
and #5
g5(l5,rin,l1,l4),
g6(l6,l4,l2,pin[3]),
g7(l7,l3,l2,q[2]),
g8(l8,l3,l1,q[3]),
g9(l9,q[3],l1,l4),
g10(l10,l4,l2,pin[2]),
g11(l11,l3,l2,q[1]),
g12(l12,l3,l1,q[2]),
g13(l13,q[2],l1,l4),
g14(l14,l4,l2,pin[1]),
g15(l15,l3,l2,q[0]),
g16(l16,l3,l1,q[1]),
g17(l17,q[1],l1,l4),
g18(l18,l4,l2,pin[0]),
g19(l19,l3,l2,lin),
g20(l20,l3,l1,q[0]);
or #5
g21(l21,l5,l6,l7,l8),
g22(l22,l9,l10,l11,l12),
g23(l23,l13,l14,l15,l16),
g24(l24,l17,l18,l19,l20);
dff
ff1(q[3],,l21,clock,1'b1,l25),
ff2(q[2],,l22,clock,1'b1,l25),
ff3(q[1],,l23,clock,1'b1,l25),
ff4(q[0],,l24,clock,1'b1,l25);
endmodule
module ls257(y,a,b,select,o_ctrl);
output[3:0] y;
input[3:0] a,b;
input select,o_ctrl;
not #5
g1(l1, select),
g2(l2, l1),
g3(l3,o_ctrl);
and #5
g4(l4,a[0],l1),
g5(l5,b[0],l2),
g6(l6,a[1],l1),
g7(l7,b[1],l2),
g8(l8,a[2],l1),
g9(l9,b[2],l2),
g10(l10,a[3],l1),
g11(l11,b[3],l2);
or #5
g12(l12,l4,l5),
g13(l13,l6,l7),
g14(l14,l8,l9),
g15(l15,l10,l11);
bufif1 #0
g16(y[0],l12,l3),
g17(y[1],l13,l3),
g18(y[2],l14,l3),
g19(y[3],l15,l3);
endmodule
module ls374(out,in,clock,oc);
output[7:0] out;
input[7:0] in;
input clock,oc;
not #5
g1(l1,oc);
buf #5
g2(l2,clock);
dff
ff0(q0,lf0,in[0],l2,1'b1,1'b1),
ff1(q1,lf1,in[1],l2,1'b1,1'b1),
ff2(q2,lf2,in[2],l2,1'b1,1'b1),
ff3(q3,lf3,in[3],l2,1'b1,1'b1),
ff4(q4,lf4,in[4],l2,1'b1,1'b1),
ff5(q5,lf5,in[5],l2,1'b1,1'b1),
ff6(q6,lf6,in[6],l2,1'b1,1'b1),
ff7(q7,lf7,in[7],l2,1'b1,1'b1);
notif1 #5
g3(out[0],lf0,l1),
g4(out[1],lf1,l1),
g5(out[2],lf2,l1),
g6(out[3],lf3,l1),
g7(out[4],lf4,l1),
g8(out[5],lf5,l1),
g9(out[6],lf6,l1),
g10(out[7],lf7,l1);
endmodule
module ls377(out,in,clock,enable_g);
output[7:0] out;
input[7:0] in;
input clock,enable_g;
not #5
nt0(clk,clock);
not #0
nt1(cl,clk);
nor #5
nr0(wn0,wn1,clk),
nr1(wn1,wn0,enable_g);
and #0
na0(c,wn1,cl);
dff
ff7(out[7],,in[7],c,1'b1,1'b1),
ff6(out[6],,in[6],c,1'b1,1'b1),
ff5(out[5],,in[5],c,1'b1,1'b1),
ff4(out[4],,in[4],c,1'b1,1'b1),
ff3(out[3],,in[3],c,1'b1,1'b1),
ff2(out[2],,in[2],c,1'b1,1'b1),
ff1(out[1],,in[1],c,1'b1,1'b1),
ff0(out[0],,in[0],c,1'b1,1'b1);
endmodule
module ls540(out,in,strobe1,strobe2);
output[7:0] out;
input[7:0] in;
input strobe1,strobe2;
or #5
or0(oebar,strobe1,strobe2);
notif0 #5
g0(out[0],in[0],oebar),
g1(out[1],in[1],oebar),
g2(out[2],in[2],oebar),
g3(out[3],in[3],oebar),
g4(out[4],in[4],oebar),
g5(out[5],in[5],oebar),
g6(out[6],in[6],oebar),
g7(out[7],in[7],oebar);
endmodule
module ls541(out,in,strobe1,strobe2);
output[7:0] out;
input[7:0] in;
input strobe1,strobe2;
or #5
or0(oebar,strobe1,strobe2);
bufif0 #5
g0(out[0],in[0],oebar),
g1(out[1],in[1],oebar),
g2(out[2],in[2],oebar),
g3(out[3],in[3],oebar),
g4(out[4],in[4],oebar),
g5(out[5],in[5],oebar),
g6(out[6],in[6],oebar),
g7(out[7],in[7],oebar);
endmodule
module mem_out_buf(out,in,oebar,cebar);
output[7:0] out;
input[7:0] in;
input oebar,cebar;
or #50
gc(c,oebar,cebar);
bufif0 #0
g1(out[0],in[0],c),
g2(out[1],in[1],c),
g3(out[2],in[2],c),
g4(out[3],in[3],c),
g5(out[4],in[4],c),
g6(out[5],in[5],c),
g7(out[6],in[6],c),
g8(out[7],in[7],c);
endmodule
module i2732(data_out,add,oebar,cebar);
output[7:0] data_out;
input[11:0] add;
input oebar,cebar;
reg[7:0] cell[0:4095],datareg;
reg[11:0] addreg;
mem_out_buf
g1(data_out,datareg,oebar,cebar);
always @add #0 addreg = add;
always @addreg #200 datareg = cell[addreg];
endmodule
module i2764(data_out,add,csbar,oebar);
output[7:0] data_out;
input[12:0] add;
input csbar,oebar;
reg[7:0] cell[0:8191],datareg;
reg[12:0] addreg;
mem_out_buf
g1(data_out,datareg,csbar,oebar);
always @add #400 addreg = add;
always @addreg #50 datareg = cell[addreg];
endmodule
module m6116(data,add,webar,oebar,cebar);
inout[7:0] data;
input[10:0] add;
input webar,oebar,cebar;
reg[7:0] cell[0:2047],datareg;
reg[10:0] addreg;
mem_out_buf
g1(data,datareg,oebar,cebar);
buf #50
g2(cebar1,cebar);
always @add #200 addreg = add;
always @addreg #50 datareg = cell[addreg];
always @(posedge webar)
if (cebar1 == 0)
begin
cell[addreg] = data;
#100 datareg = cell[addreg];
end
endmodule
module ls157(y,a,b,select,strobe);
output[3:0] y;
input[3:0] a,b;
input select,strobe;
not
g1(_select, select),g2(_strobe, strobe);
buf #5
g3(select2, select);
and #5
g4(A_select, _strobe, _select),
g5(B_select, _strobe, select2);
and #5
g6(l1, a[0], A_select),
g7(l2, a[1], A_select),
g8(l3, a[2], A_select),
g9(l4, a[3], A_select),
g10(l5, b[0], B_select),
g11(l6, b[1], B_select),
g12(l7, b[2], B_select),
g13(l8, b[3], B_select);
or #5
g14(y[0], l1, l5),
g15(y[1], l2, l6),
g16(y[2], l3, l7),
g17(y[3], l4, l8);
endmodule
module rsff(q,s,r);
output q;
input s,r;
nand #5
g1(l1,q,r),
g2(q,s,l1);
endmodule