작성일: 2006.05.06


  Debug & Demo Boards: ProASIC3 Starter Kit

ProASIC3 Starter Kit

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Click on the image for a larger view

The ProASIC3 Starter Kit is a complete package that enables you to quickly evaluate Actel's ProASIC3 family and prototype your design.The low-cost ProASIC3 Starter Kit comes in two versions and contains everything you need to start using the advanced features of Actel's ProASIC3 family including the capability for designs with 600k gates using Libero IDE Gold. The advanced version features a socketed board with an A3PE600 device in a PQ208 package, allowing other devices from the ProASIC3/E family to be fitted to the board. The second version comes with an A3P250 device directly soldered to the board.

This ProASIC3 Starter Kit contains the following:

More information:

  ProASIC3 Starter Kit Full PCB Design Files  ZIP 11.2 MB 3/06
  ProASIC3 Starter Kit FPGA Design Example Files  ZIP 955 KB 3/06
  ProASIC3 Starter Kit Brochure  PDF 410 KB 3/06
  ProASIC3 Starter Kit Board Schematics  PDF 408 KB 8/05
  ProASIC3/E Starter Kit User's Guide and Tutorial  PDF 6.1 MB 8/05


ProASIC3 Starter Kit에 포함된 CDROM의 압축image 파일입니다...  포함된 내용은 User's Guide, Starter Kit의 Schematic과 PCB 설계파일, Gerber Data, Sample Project등입니다...  좀더 자세한 목록은 아래에 나와있습니다...
    pa3starterkit_cdrom.zip (42,421,552 bytes)

Folder PATH listing for ProASIC3 Starter Kit's CDROM

<CDROM root>:\

│  README_FIRST.txt

│  

├─Actel Overview

│  └─Actel Overview

│          ISO9001andQML38535Certificate.pdf

│          selguide.pdf

│          ShortForm.pdf

│          

├─Application Notes

│  │  Core1553_8051_AN.pdf

│  │  Core_1553_8051_SFR_DesignFiles_VHDL.zip

│  │  EmbeddedSRAMDesignFiles.zip

│  │  EmbeddedSRAMInit_AN.pdf

│  │  PA3_E_DDR_AN.pdf

│  │  PA3_E_FROM_AN.pdf

│  │  PA3_E_Global_AN.pdf

│  │  PA3_E_ISP_AN.pdf

│  │  PA3_E_Microprocessor_AN.pdf

│  │  PA3_E_Multipliers_AN.pdf

│  │  PA3_E_Security_AN.pdf

│  │  PA3_E_SRAMFIFO_AN.pdf

│  │  PA3_E_UJTAG_AN.pdf

│  │  Pack_Therm_AN.pdf

│  │  PckgMechDrwngs.pdf

│  │  ProASIC3_E_PowerUp_AN.pdf

│  │  

│  ├─Technical Brief

│  │      PA3_E_WaveGen_TB.pdf

│  │      

│  ├─Verilog

│  │      Core_1553_8051_MEM_DesignFiles_Verilog.zip

│  │      Core_1553_8051_SFR_DesignFiles_Verilog.zip

│  │      

│  └─VHDL

│          Core_1553_8051_MEM_DesignFiles_VHDL.zip

│          

├─Datasheets_&_Product_Briefs

│  ├─Datasheets

│  │      PA3E_DS.pdf

│  │      PA3_DS.pdf

│  │      

│  └─Product_Briefs

│          PA3E_PB.pdf

│          PA3_PB.pdf

│          

├─ProASIC3_StarterKit_Info

│  ├─FPGA_Design

│  │  │  README.txt

│  │  │  

│  │  ├─ADB_Files

│  │  │      Emailing_ADB_Files.txt

│  │  │      README.txt

│  │  │      TOP_A3P250.adb

│  │  │      TOP_A3PE600.adb

│  │  │      TOP_ADB_A3P250.zip

│  │  │      TOP_ADB_A3PE600.zip

│  │  │      

│  │  ├─STAPL_Files

│  │  │      Emailing_STP_Files.txt

│  │  │      README.txt

│  │  │      TOP_A3P250.stp

│  │  │      TOP_A3P250.zip

│  │  │      TOP_A3PE600.stp

│  │  │      TOP_A3PE600.zip

│  │  │      

│  │  └─VHDL_Files

│  │          binary_counter.vhd

│  │          clockdiv.vhd

│  │          count8.vhd

│  │          Data_block.vhd

│  │          Data_to_LCD.vhd

│  │          LED_Flashing.vhd

│  │          mux2.vhd

│  │          my_clk_divider.vhd

│  │          Top.vhd

│  │          

│  ├─PA3_StarterKit_Schematics

│  │      PA3_StartKit_SS.pdf

│  │      

│  ├─PA3_StarterKit_User_Guide

│  │      PA3_Startkit_UG.pdf

│  │      

│  └─PCB_Design

│      │  README.txt

│      │  

│      ├─Board Layer PDF

│      │      bottom6mirror_pa3_rev3.pdf

│      │      bottom6_pa3_rev3.pdf

│      │      pa3e_brd_silk_bottom_mirror.pdf

│      │      pa3e_brd_silk_top.pdf

│      │      README.txt

│      │      sig3_pa3_rev3.pdf

│      │      sig4_pa3_rev3.pdf

│      │      top1_pa3_rev3.pdf

│      │      

│      ├─Design Fab and Assembly Files

│      │  │  A3PE-A3P-EVAL-BRD1_design_files.zip

│      │  │  README.txt

│      │  │  

│      │  ├─Allegro BRD File

│      │  │      s1649a_060205_ecad.brd

│      │  │      

│      │  └─DSN File

│      │          S1649A_schematic.DSN

│      │          

│      └─LCD Display Data

│              81809d_01 rev a.pdf

│              mdl app notes.pdf

│              nt3881dv2.1.pdf

│              

├─Product Information Briefs

│      FlashPro_PIB.pdf

│      PA3_E_PIB.pdf

│      PA3_E_StarterKit_PIB.pdf

│      Power_PIB.pdf

│      Security_PIB.pdf

│      TSC_PIB.pdf

│      

└─White Papers

        PA3_E_Tech_WP.pdf

        ValueFPGA_WP.pdf

Copyright © 1985 - 2006 by Actel Corporation, Mountain View, CA 94043-4655 USA. All rights reserved.

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