70 Mon Jul 17 /evtfs/home/tres/vhdl/ref_design>  vsim -c test_uart -do "run -all; exit"

# 6.2a

# vsim -do {run -all; exit} -c test_uart 

# Loading /flip/usr1/modeltech/linux/../std.standard
# Loading /flip/usr1/modeltech/linux/../ieee.std_logic_1164(body)
# Loading /flip/usr1/modeltech/linux/../ieee.numeric_std(body)
# Loading work.uart_pkg
# Loading work.test_uart(sim)#1
# Loading work.uart(templates)#1
# run -all 
# ** Note: Saw reset rise and fall OK
#    Time: 105 ns  Iteration: 1  Instance: /test_uart
# ** Note: Using fixed_delay_c = 1080 ns That's 108 ticks.
#    Time: 105 ns  Iteration: 1  Instance: /test_uart
# ** Note: ___Step 0
#    Time: 1275 ns  Iteration: 1  Instance: /test_uart
# ** Note: ____________ saw 36 as expected
#    Time: 1275 ns  Iteration: 1  Instance: /test_uart
# ** Note: ___Step 1
#    Time: 2445 ns  Iteration: 1  Instance: /test_uart
# ** Note: ____________ saw 199 as expected
#    Time: 2445 ns  Iteration: 1  Instance: /test_uart
# ** Note: ___Step 2
#    Time: 3615 ns  Iteration: 1  Instance: /test_uart
# ** Note: ____________ saw 24 as expected
#    Time: 3615 ns  Iteration: 1  Instance: /test_uart
# ** Note: ___Step 3
#    Time: 4785 ns  Iteration: 1  Instance: /test_uart
# ** Note: ____________ saw 131 as expected
#    Time: 4785 ns  Iteration: 1  Instance: /test_uart
# ** Note: ___Step 4
#    Time: 5955 ns  Iteration: 1  Instance: /test_uart
# ** Note: ____________ saw 211 as expected
#    Time: 5955 ns  Iteration: 1  Instance: /test_uart
# ** Note: ___Step 5
#    Time: 7125 ns  Iteration: 1  Instance: /test_uart
# ** Note: ____________ saw 217 as expected
#    Time: 7125 ns  Iteration: 1  Instance: /test_uart
# ** Note: ___Step 6
#    Time: 8295 ns  Iteration: 1  Instance: /test_uart
# ** Note: ____________ saw 58 as expected
#    Time: 8295 ns  Iteration: 1  Instance: /test_uart
# ** Note: ___Step 7
#    Time: 9465 ns  Iteration: 1  Instance: /test_uart
# ** Note: ____________ saw 229 as expected
#    Time: 9465 ns  Iteration: 1  Instance: /test_uart
# ** Note: ___Step 8
#    Time: 9885 ns  Iteration: 1  Instance: /test_uart
# ** Note: ____________ saw 229 as expected
#    Time: 9885 ns  Iteration: 1  Instance: /test_uart
# ** Note: ___Step 9
#    Time: 10305 ns  Iteration: 1  Instance: /test_uart
# ** Note: ____________ saw 131 as expected
#    Time: 10305 ns  Iteration: 1  Instance: /test_uart
# ** Note: ___Step 10
#    Time: 10725 ns  Iteration: 1  Instance: /test_uart
# ** Note: ____________ saw 46 as expected
#    Time: 10725 ns  Iteration: 1  Instance: /test_uart
# ** Note: ___Step 11
#    Time: 11145 ns  Iteration: 1  Instance: /test_uart
# ** Note: ____________ saw 217 as expected
#    Time: 11145 ns  Iteration: 1  Instance: /test_uart
# ** Note: ___Step 12
#    Time: 11565 ns  Iteration: 1  Instance: /test_uart
# ** Note: ____________ saw 199 as expected
#    Time: 11565 ns  Iteration: 1  Instance: /test_uart
# ** Note: ___Step 13
#    Time: 11985 ns  Iteration: 1  Instance: /test_uart
# ** Note: ____________ saw 229 as expected
#    Time: 11985 ns  Iteration: 1  Instance: /test_uart
# ** Note: ___Step 14
#    Time: 12405 ns  Iteration: 1  Instance: /test_uart
# ** Note: ____________ saw 131 as expected
#    Time: 12405 ns  Iteration: 1  Instance: /test_uart
# ** Note: ___Step 15
#    Time: 12825 ns  Iteration: 1  Instance: /test_uart
# ** Note: ____________ saw 46 as expected
#    Time: 12825 ns  Iteration: 1  Instance: /test_uart
# ** Note: ___ALL PASS___
#    Time: 12825 ns  Iteration: 1  Instance: /test_uart
#  exit